Avalon on a backplane ??

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Thank you for your answers.

My application doesn't need a high throwput because the Master will only have to send commands to and receive status from the slaves cards. However, the clock in the FPGA which wll driver the Avalon bus is 25 MHz so like Josyb said, I have to worry about signal integrity. Josyb, do you have any advice for nice impedance controlled boards and suitable connectors for this application. For connectors, I thought about using cPCI connector but I don't know how to do the impedance adaptation on the master Bord and on the slave boards.

To my mind, as there is only 1 Master and that the Avalon bus offer one Data Bus for write operation (writedata) and one Data Bus for read operation (readdata), I think that I only have to implement a tri-state register in the Slave CPLD on the readdata bus. I have posted a JPG file of the topology of the bus. Do you agree with this ?

Finally, have you heard about any previous project that have chosen this architecture with a Avalon Bus in the Backplane. Maybe, any revendors of FPGA board that can be usefull for me for this application of Avalon Backplane.

Nicolas.

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Basically your jpg shows a workable set-up. I tend to side with rbugalho and also recommend to use a 'proprietary' bus system and to try to minimize on the number of connections. You then can have a smaller backplane with smaller connectors.

The controlled impedance is by design: use a 6 or 8 layer pcb and lay out buried (assymetic) striplines and aim at the smallest reasonable width of the tracks. This will get you an impedance between 50 and 100 ohms, the higher the better. You need to 'parallel terminate' the write data and addresses coming from the main FPGA at the far bus side with a resistor of the value obtained in the layout. The read data has to 'parallel terminated' with this value on both sides of the bus. You should check if the CPLD has enough output current to drive the lines.

The cPCI connectors you mention are perfectly usable in your setup. In theory you have to match the impedance of your tracks to the values stipulated for the connector, so you may have to layout the board for possibly 50 or 60 ohms characteristic impedance.