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Altera_Forum's avatar
Altera_Forum
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13 years ago

Avalon MM/ST/SGDMA Byte ordering

Hi,

I'm using the SGDMA IP core to transfer some data from Avalon MM interface to Avalon ST interface and back to Avalon MM.

Everything 32 bit width.

NIOS->Memory-> Avalon MM -> SGDMA -> Avalon ST -> ST-FIFO-ST -> ST-My_Component-ST -> ST-FIFO-MM -> NIOS

Using MY_component, I'm trying to simply zero out the upper nibble of each word. Bits 15:12 = 0 and Bits 31:28 = 0.

When I read in NIOS, it seems to be zeroing out the wrong bits and I can't seem to figure out which is which.

I think somewhere there is byte reordering and I don't know how/where. I read somewhere that ST/MM have different byte ordering.

And there is a parameter in the SGDMA core for byte reordering which makes it even more confusing.

Has anyone faced this and point out where what happens?

:confused:

Cheers

Zubair

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Yes I have faced this problem before. The Avalon MM specification is little endian and the Avalon Stream specification is big endian.

    How did you configure the SGDMA? IIRC if you configure its data size as 4 symbols per tick and 8 bits per symbol, instead of 1 symbol per tick and 32 bits per symbol, it will convert the endianes for you. I'm not 100% sure though, it was a while ago I had to solve this problem.
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    the SGDMA doesn't like 32 bits per symbol. It only accepts 8 bits per symbol.

    So the rest are configured 8 bits per symbol and 4 symbols per tick.

    p.s. using quartus 12 if that makes a difference.

    Thanks

    Zubair
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    I had a look at our old code and in fact we did the endian conversion in software. Indeed the SGDMA can't be directly configured to process 32-bit words and only works with bytes. You will either have to work with big endian values in software, or add you own custom stream component that will shift the bytes around to get 32-bit values as they are seen by the CPU.

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Its really confusing working with Avalon ST being big endian and Nios/Avalon MM being little endian. And only byte wise. I am not sure if its bit wise.

    I managed to work it out. Thanks for the help.

    -

    Zubair