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Altera_Forum's avatar
Altera_Forum
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17 years ago

auto-restart configuration after error (in passive serial)

Hello,

We have an ACEX1K FPGA configured by EPC2 in Passive Serial. I'm reading the Configuration Handbook over and over and can't figure out something: in case of a configuration error, will re-configuration happen from the EPC2 in any case, or only if the "auto restart configuration after error" bit is set ?

There are two paragraphs in the Handbook which seem to conflict a little:

--- Quote Start ---

If an error occurs during configuration, the FPGA drives its nSTATUS pin

low, resetting itself internally. Since the nSTATUS pin is tied to OE, the

configuration device will also be reset. If the Auto-Restart Configuration

After Error option available in the Quartus II software from the General

tab of the Device & Pin Options dialog box is turned on, the FPGA

automatically initiates reconfiguration if an error occurs. The Mercury,

APEX 20K (2.5 V), ACEX 1K, or FLEX 10K device releases its nSTATUS

pin after a reset time-out period (maximum of 40 μs). When the nSTATUS

pin is released and pulled high by a pull-up resistor, the configuration

device reconfigures the chain. If this option is turned off, the external

system must monitor nSTATUS for errors and then pulse nCONFIG low to

restart configuration. The external system can pulse nCONFIG if nCONFIG

is under system control rather than tied to VCC.

In addition, if the configuration device sends all of its data and then

detects that CONF_DONE has not gone high, it recognizes that the FPGA

has not configured successfully. Enhanced configuration devices wait for

64 DCLK cycles after the last configuration bit was sent for CONF_DONE to

reach a high state. EPC1 and EPC2 devices wait for 16 DCLK cycles. In this

case, the configuration device pulls its OE pin low, which in turn drives

the target device’s nSTATUS pin low. If the Auto-Restart Configuration

After Error option is set in the software, the target device resets and then

releases its nSTATUS pin after a reset time-out period (maximum of

40 μs). When nSTATUS returns high, the configuration device tries to

reconfigure the FPGA.

--- Quote End ---

So is turning the "auto-restart" bit in Quartus essential for reconfiguration to work with EPC2, or will EPC2 figure it out by its own when CONF_DONE is not raised ?

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Yes.

    Read it all again.

    In all cases, the nSTATUS is low, then is release to go hi.