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Altera_Forum's avatar
Altera_Forum
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16 years ago

Asynchronous adress decoder

Hi, I have heired an old design which contains of a lot of AHDL moduls. I would like to rewrite these moduls into VHDL so that I can simulate them in modelsim. One thing I realized is that...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

I don't understand, why you see a difference between using AHDL and VHDL. Both languages can represent synchronous and synchronous designs, both above examples are asynchronous. If problems arise with an asynchronous VHDL design, it's the same with AHDL.