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Altera_Forum
Honored Contributor
16 years agoAsynchronous adress decoder
Hi, I have heired an old design which contains of a lot of AHDL moduls. I would like to rewrite these moduls into VHDL so that I can simulate them in modelsim. One thing I realized is that...
Altera_Forum
Honored Contributor
16 years agoi've done gate level simulations of designs including AHDL just so i could use ModelSim. might be worth looking into.