Async FIFO size in AVMM interconnect

For the blocks to the left in the above picture (called dma_reader and dma_writer) we wrote our own component _hw.tcl files. Here a snippet of the _hw.tcl file of the dma_writer:

add_interface dma_output avalon start
set_interface_property dma_output addressUnits SYMBOLS
set_interface_property dma_output associatedClock clk
set_interface_property dma_output associatedReset clr
set_interface_property dma_output bitsPerSymbol 8
set_interface_property dma_output burstOnBurstBoundariesOnly false
set_interface_property dma_output burstcountUnits WORDS
set_interface_property dma_output doStreamReads false
set_interface_property dma_output doStreamWrites false
set_interface_property dma_output holdTime 0
set_interface_property dma_output linewrapBursts false
set_interface_property dma_output maximumPendingReadTransactions 0
set_interface_property dma_output maximumPendingWriteTransactions 0
set_interface_property dma_output readLatency 0
set_interface_property dma_output readWaitTime 1
set_interface_property dma_output setupTime 0
set_interface_property dma_output timingUnits Cycles
set_interface_property dma_output writeWaitTime 0
set_interface_property dma_output ENABLED true
set_interface_property dma_output EXPORT_OF ""
set_interface_property dma_output PORT_NAME_MAP ""
set_interface_property dma_output CMSIS_SVD_VARIABLES ""
set_interface_property dma_output SVD_ADDRESS_GROUP ""
 
add_interface_port dma_output AVMMMWriteDataValid_o write Output 1
add_interface_port dma_output AVMMMWriteData_o writedata Output OUT_DATA_WIDTH_G
add_interface_port dma_output AVMMMBurstCount_o burstcount Output 6
add_interface_port dma_output AVMMMAddress_o address Output 64
add_interface_port dma_output AVMMMWaitRequest_i waitrequest Input 1

Is there a way to achieve a larger FIFO depth in the automatically generated interconnect by changing the parameters of the components connected to the interconnect? I would like that an entire burst of 32 words fits into the FIFOs.