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Thanks for your reply,
Yes. that is intended.
"q1 is defined as output and must be driven continously", can you explain more about this? what does the assign actually do on that? extending the wire for the output?
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Hi,
yes it is like a wire to the output.
"when I assign to q1 = q [1] the circuit would be different when q1 = q[2]."
It looks different, because of logic optimization. You defined the input num_reg as
a 3-bit vector. That means you can have up to 8 Registers. You never will use q[0],
because your loop index starts with 2. When you assign the output q1 to e.g. q[1]
Quartus recognized that all registers with a higher index as "1" are not used und will
be not implemented.
Kind regards
GPK
Honored Contributor
