Forum Discussion
TSuzu6
New Contributor
6 years agoArria10 transceiver PHY rx_control[] issue
Hi! In our Arria10 device, transceiver phy is configured as below, -Transceiver Configuration rules:Basic(Enhanced PCS) -PMA configuration rules:basic -Number of data channels:6 -Data rate:6144...
Deshi_Intel
Regular Contributor
6 years agoHI Taira,
Sorry, I haven't got chance to review all your latest update yet.
We used to be able to fix fPLL location using QSF "location" command. Refer to below link
- https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd08092011_447.html
- However, take note this is for older FPGA, not Arria 10 FPGA
- Anyway, you can give it a try on your Arria 10 project. Just checked for the fPLL node path in fitter report.
Thanks.
Regards,
dlim