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Honored Contributor
Honored ContributorArria10 HPS Fpga to Sdram cannot be configured above 64 bits
Hi All, I want to use the fpga to sdram path in Arria 10 HPS. I want to connect a 256bit AXI interface operating at 125 Mhz from a third party IP to this port. I had a couple of questions: ...
Altera_ForumHonored Contributor
Honored Contributordo you use qsys to configure your HPS? you have to add a HPS component
in this component are parameter for ram width and ram protocol as far as i know, hps ram can be up to 64 bit and you can add a fpga-to-hps-interface axi interface with up to 256 bit width don't mix up ram data witdh and axi interface width i use cyclone v fpga to hps interface with 150 MHz, Arria 10 should be more powerful
