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Yamada1's avatar
Yamada1
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Arria10 GX Unused Pin Handling

I was designing a design targeting 10AX027H3F35E2SG, but I couldn't fit the design We are planning to change to 10AX066K3F35E2SG. Since the board has been manufactured, I would like to replace it, ...
lixy's avatar
lixy
Icon for Contributor rankContributor
2 years ago

Hi Yamada,

​

About the first question, what FvM said is correct. We can power down the VCCIO if the that I/O bank is unused. You can see this from the KDB below: https://www.intel.com/content/www/us/en/support/programmable/articles/000076285.html

You just need to pay attention that you should still connect these VCCIO pins to GND instead of floating. Also, there are always multiple VCCIO2I for 2I bank, make sure that all the VCCIO2I are connected to GND.

However, if you power down the power supply only for Power Saving, power down this unused I/O would not make much difference. So we recommend user to connect the VCCIO even the bank is not used.

​

About the second question, in Arria 10 Pin Connection Guideline, you can find that the PLL power supply is VCCA_PLL. VCCIO is basically for I/O buffer.


Anyway, we still recommend you to connect all the VCCIO even if the bank is not used.


Thanks & Regards,

Xiaoyan