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Yamada1's avatar
Yamada1
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Arria10 GX Unused Pin Handling

I was designing a design targeting 10AX027H3F35E2SG, but I couldn't fit the design We are planning to change to 10AX066K3F35E2SG. Since the board has been manufactured, I would like to replace it, ...
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
2 years ago
Refer to pin connection guideline, all GND pins need to be connected. IO banks may be powered down (except for 2A) if the related IO pins are not driven above 1.1 V. If I understand right, you can't fulfill the GND connection requirement. Correct FPGA operation is respectively not guaranteed, you may want to check if works though.