Forum Discussion

TG_GER's avatar
TG_GER
Icon for New Contributor rankNew Contributor
2 years ago

Arria10 FPGA config directly from TFTP

I have an ARRIA10 SoC FPGA, and the memory card need to supposed to be hardware write-protected. At the end only u-boot is present on the SD card. It should retrieve the FPGA configuration, kernel,...
Configuration
aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi TG_GER,


Sorry for the late reply.

From your logs, the socfpga.rbf is configured where the 2gb ram is available for HPS usage. You proceed to load the core.rbf from the sd card to the ram address 0x50000 then with fpga load to configure the core.rbf.

The socfpga.rbf should be the periphery.rbf. Configuration of periphery: this allows HPS DDRAM to be brought up, and must do be done in SPL

The ddr which is used by the HPS is normally determined in Uboot fsbl in the early stage which is in your case is the 2gb ram.

Refer to this building bootloader documentation as reference on seperate configurations:

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10#Option_351_45_Separate_Configuration_Files


Thanks.

Regards,

Aik Eu