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I run the Quartus Prime Version 18.0.0.219 by Administrator mode.
Processing -> Start -> Start Analysis & Synthesis
Then there are many errors such as :
Error(13225): Can't open VHDL or Verilog HDL file "ip/generic_flash_access/generic_flash_access_intel_generic_serial_flash_interface_top_0/intel_generic_serial_flash_interface_xip_180/synth/generic_flash_access_intel_generic_serial_flash_interface_top_0_intel_generic_serial_flash_interface_xip_180_tsjvvby.sv"
Error(13223): Verilog HDL or VHDL error: cannot open verilog file 'ip/generic_flash_access/generic_flash_access_intel_generic_serial_flash_interface_top_0/intel_generic_serial_flash_interface_xip_180/synth/generic_flash_access_intel_generic_serial_flash_interface_top_0_intel_generic_serial_flash_interface_xip_180_tsjvvby.sv'
The files exist but the compiler can't find them .