Arria V Starter kit - Simple Socket Server (RGMII) how to address DHCP failures?

I diagnosed the problem and have the simple socket server example (with uCOSII, niche stack, and TSE) running on the Arria V GX Starter kit. The problem is due to the following instantiation of the ALTDDIO_OUT primitive in top.v of the cvgt_simple_socket_server.par design example:

// Ethernet interface assignments

enet_gtx_clk_ddio_buffer enet_gtx_clk_ddio_buffer_inst (

.aclr ( !cpu_resetn ), // <-- this should be .aclr ( cpu_resetn )

.datain_h ( 1'b1 ),

.datain_l ( 1'b0 ),

.outclock ( tx_clk_to_the_tse_mac ),

.dataout ( enet_gtx_clk )

);

When using an Arria V GX with Quartus 18.1.0 tools, cpu_resetn must not be inverted. The aclr input to the ALTDDIO_OUT primitive is true low as is cpu_resetn. Apparently, either the Cyclone V GT has a high true aclr input to the ALTDDIO_OUT primitive or the primitive changed somewhere between the 16.0.0 and 18.1.0 tools versions.

it's hard to believe that I'm the only one tripped up by this. It was very costly in terms of project schedule. Perhaps Intel should release a simple socket server design example for Arria V with the cpu_resetn polarity fixed. That would have saved me weeks of schedule delay.

At any rate, thanks for responding dlim.