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Altera_Forum's avatar
Altera_Forum
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10 years ago

Arria V 64-Bit multiplication

I noticed while running Quartus timing analysis on a simple 64x64 bit multiplication (with 2 pipeline stages) on the Arria V board that I was getting very low Fmax values. Looking into the Chip P...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

In simpler terms:

When carrying out 2 stage or more pipelined 64bit x 64bit multiplication on Arria V, I cannot activate the output register in the DSP.

Any ideas?

Thanks!