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Altera_Forum's avatar
Altera_Forum
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14 years ago

ARRIA II GZ problem

The ARRIA II GZ device handbook says that the nCONFIG and nSTATUS to be pulled up to VCCPGM at 3V for ARRIA II GZ device . The page number in the handbook is 318 . Now my question is why is it specifying the voltage to be at 3.0V . What if i use the whole of configuration block at 2.5 V so all my VCCPGM pins and configuration lines are at 2.5 V

Query 2 : When i am not using DEV_OE should nt i need to pull it up instead of pulling it down to ground. The description says that DEV_OE :"Optional pin that allows designers to override all tri-states on the

device. When this pin is driven low, all I/O pins are tri-stated;

when this pin is driven high, all I/O pins behave as defined in the

design" " When the dedicated input DEV_OE is not used and this pin is not used as an I/O then it is recommended

to tie this pin to ground."

So what should be the state of DEV_OE in case i dont want to use it ...Please reply fast

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Other parts of the documentation state that the VCCPGM line can be at 1.8, 2.5 or 3.0V so I don't see any reason why you couldn't use 2.5V for your pull-ups. It looks like all the configuration schemes that use an EPCS flash in that documentation mention this 3.0V voltage level, probably because the flash doesn't support a 2.5V supply and Altera is afraid of overshoots with a 3.3V supply. On page 318 (9-34) it could just be a bad copy/paste.

    DEV_OE is an optional function, and will be used only if you enable it in the device options window. By default it is disabled and you can use this pin as a regular I/O.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Thanks for the reply....

    Can you also please explain to me

    I am going to use EP2AGZ225HF40I3N in my design. Now my doubt is if

    1) If i need to use the Bank 1A at 3.0 V LVCMOS, then what other configuration signals in the bank need to be at VCCPD of this bank which will be 3.0V in this case. from the datasheet i can see that the JTAG siganls are one such group which will be using the power from VCCPD of Bank 1A and thus need to be at 3.0V .

    2) Are there any other signals which need the change based on this.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    I'm not sure I understand. Are you planning to switch to 3.0V after all? My opinion is that you can use 1.8/2.5/3.0V for VCCPGM.

    I've never used the Aria FPGA but I'd say the pins referred to VCCPGM must be at least the JTAG pins, the MSEL pins, and the configuration pins (nCONFIG. CONF_DONE, nSTATUS...)