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Honored Contributor
Honored ContributorArria II DDR2 clock assignment
Hello, I am trying to use 2 x16 DDR2 chips and combine them as 1 x32 DDR2 using the HP DDR2 IP. I am using differential DQS and have one CK/CK# pair per chip. In the emi_plan_pin document...
Altera_ForumHonored Contributor
Honored ContributorI believe the only requirement is that you place the CK/CK# pair in the same DQ group and follow the rules you've already outlined about which pins they can reside on. I do not believe there is any requirement for them CK/CK# pins to be located in the same DQ group as your actual DQ/DQS pins.
Try it in Quartus. If you get it wrong, it should give you an error. Jake
