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Altera_Forum
Honored Contributor
9 years agoArria 10 SX - The Fitter cannot place logic IO_LANE ???
Hello, Actually, I use a Reflex CES Achilles board with a SoC FPGA Arria 10 (10AS066H4F34E3SG). The board is also equipped with two DDR4 memory (2x8 GB). One of them can be accessible from the ...
Altera_Forum
Honored Contributor
9 years agoJoco, did you ever resolve your problem. I have the same issue. @sstrell, qSys doesn't complain only at compile time do you get this error.