Forum Discussion

TomCarpenter's avatar
TomCarpenter
Icon for Occasional Contributor rankOccasional Contributor
2 years ago
Solved

Arria 10 HPS, SPIM mapped to FPGA

I am trying to wire up a SPIM peripheral from the Arria 10 HPS to FPGA IO pins, and there is one point of confusion in the technical reference manual. In Table 214, the naming of pins, there is an o...
Generic Io
  • TomCarpenter's avatar
    TomCarpenter
    2 years ago

    So my issue was actually a pin assignment rather than the output enable logic.

    After a bit of testing, it would seem for the Arria 10 the diagram in the technical reference manual is wrong. The output enable is active high

    Following the signal naming convention not the diagram. The output enable is active high:

    assign mosi = spim_mosi_oe ? spim_mosi_o : 1'bz;
aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi TomCarpenter,


Since the issue has been resolve I will close the thread for now. I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


Thanks.

Regards,

Aik Eu