New Contributor
Regular ContributorHI Jonathan,
If you want a constant value for a certain input pin driven from the board, then instead of just a resistor tie to VCC or GND, it recommended to use a transistor or mux logic to control the pin. The pin should not be driven at power up from the board. The external driving logic should be enabled after complete power-up and configuration only.
Regards.
New ContributorWill DEV_OE work to tristate all pins, or does it need to be external? Also If I am understanding you right this applies to unused pin. So all 3VIO pins, need to be left floating at powerup? Even the CLK and PLL pins?
This basically means I have to put external try states on all the 3VIO pins I use. Thumb switches need an external tristate, because they are either pulled high or low. Even LEDs need an external driver, even though you can set 3V LVTTL to 24mA. Because at power up the LEDs could possibly pull the pins high or low with a good amount of current.
I2C pins( or any open drain) also need a bidirectional tristate, because they cannot be pulled high, and especially if they is a chance they could be low on power up.
Is this a little quirk with ARRIA 10s I don't remember seeing this on previous FPGAs. And it's weird it really only applies with the 3VIO. the LVDS banks can handle 10mA per pin at power up and no more than 100mA per bank, and can be tied to gnd.
I guess I will just use tristates or move the pins to another bank and use Level Translators.
