New Contributor
Regular ContributorHi Jonathan,
Is this talking about interally driving pins with FPGA code, or
externally driving pins?
--> It is related to driving pins externally.
The table is related to some of the options available for "Hot-socketing" i.e. driving pins externally during power-up.
Please refer the Arria 10 Pin connection guidelines for how to manage unused pins on board.
https://www.intel.com/content/www/us/en/programmable/documentation/wtw1404286459773.html
Regards.
New ContributorThank You, So it appears you can connect unused pins to ground, even during power-up. So I should be able to tie used pins to ground during power up. I don't plan on "Hot Socketing", there is no plan to connect the board while the power is on. Some devices on the PCB will power up before the FPGA. I was just wondering why it appeared to me that you couldn't have pins tied to ground, before power-up. but it looks like that only applies to hot socketing.
What about having pins connected to VCCIO? Is it ok to have external devices powered by the same VCCIO? I am thinking as long as it is the same VCCIO that power that FPGA VCCIO bank and they power up at the same time, it should be ok. The problem happens when an unpowered FPGA gets a external voltage on it's pins
I am also assuming that 10K pull-ups to 3.3V should be ok also, since that would be very little current.
