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fpga6's avatar
fpga6
Icon for New Contributor rankNew Contributor
3 years ago
Solved

Arria 10 ASDATA Flash interface

Hi, I am using an Intel Arria 10 FPGA. Is it possible to access the pins ASDATA0/1/2/3 and DCLK to read/write to the configuration flash during user mode, without using Intel's "Generic serial fla...
  • fpga6's avatar
    fpga6
    3 years ago

    Issue resolved, flash problem due to failed/stuck bit in volatile configuration register.

    Solution to accessing Arria 10 ASDATA/DCLK pins, without using Intel IP, during user mode is to use Arria 10 primitives.

FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
3 years ago

Hello,
why should it not be possible? The method is just the same as using ASMI Parallel without dedicated AS interface, connecting asmi pins on the design top interface.

I found however, that ASMI parallel IP is well suited for similar purposes, with a few modifications like gating DCLK and possibly tri-stating asmi pins if concurrent devices are driving the flash in your design.

Regards,

Frank