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relsaar's avatar
relsaar
Icon for New Contributor rankNew Contributor
5 years ago

Aria V Display Port core sometimes disconnected

Hi All We have a PCB board we designed with AMD 8860 GPU that sends DP video to Aria V Display Port core (Qsys). In some of our boards we sometimes have DP connection issues. The video signal goe...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


This is weird.


The only 2 reason that I can think of is either

  1. You didn't enable the signal_tap *.stp file correctly in your quartus design
  • Ensure you added signal_tap *.stp file in Quartus setting and recompile design
    • You should see a lot of additional signal_tap setting in Quartus project *.qsf file if you added signal_tap and compile successfully
  1. Or there is something wrong with your board JTAG connection
  • You can try reduce JTAG frequency from 24MHz to either 16MHz or 6MHz to see if it helps


Likewise you can also create simple one wire dummy Quartus design and add signal_tap to isolate is it DP Quartus design issue or your board issue


Thanks.


Regards,

dlim


relsaar's avatar
relsaar
Icon for New Contributor rankNew Contributor
5 years ago
Hi,
I managed to program the starter kit 20.1 design example with Quartus 18.2. Looks like a bug that appears sometimes.
I tried to port the design example to our board but it seems the ALMs requirements for the example design is 5% higher than our PLD resource.
29,792 / 28,300 ( 105 % ) Logic utilization (in ALMs)

Is there any way to reduce the design example a bit? We are trying to purchase a larger pld and migrate our board.
Thanks
Ariel
  • relsaar's avatar
    relsaar
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi,

    I'm trying to migrate from our 5AGXMA1D4F27I5 and I get only two options in the Quartus ->migration device: 5AGXMA3D4F27I5 or 5AGXMA3D4F27C5 (both parts have no stock available)

    Can I assemble another Arria V with different embedded hard IP? (see page 6#) I can migrate to 5AGXBA3D4F27C4N or 5AGXFA3D4F27C4N?
    Can I compromize on Transceiver Count# or Transceiver Speed Grade and still run the example design successfuly on my board that was designed for 5AGXMA1D4F27I5?

    Thanks

    Ariel

    • relsaar's avatar
      relsaar
      Icon for New Contributor rankNew Contributor
      5 years ago

      Hi,

      I created a spread sheet with all arria V with the similar package code and package type that can potentially host the design example on my board. Can you please help me filter out all the appropreate candidates PLDs?

      Thanks

      Ariel Saar