Are Stratix V IOE delays programmable dynamically?

Hi John:

Yes, we use the PLL sweep of the eye pattern at each bootup via the cpu. We have found the results very consistent. run from run, but we never bothered to fix the setting to verify (our bootup time wasn't that critical that it mattered.) We did have matched traces on the data lines. But unless you have significant skew between data lines you should be able to find a place that works.

Running though your process, there shouldn't be significant difference lot to lot, unless you have bad solder joints, or miss-loads that drastically change the timing. Then you would probably be stuck with an unworkable solution anyway.

I could see drastic changes, if they changed the materials used on the board, or messed up the stackup for a run. But those are process issues that I would want to know happened. The eye pattern sweep would probably correct for this, but it could really cause cross-talk, or other issues that would cause problems.

Pete