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Altera_Forum
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14 years ago

Are outputs of PLL related all the time?

Hi, Currently, i am timing constraining my FPGA design. I would like to know are the outputs of PLL related with each other (sync) all the time? 1)What if the output frequency is multiple...
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Altera_Forum
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14 years ago

Relation of PLL outputs to input and to each other is provided by resetting all involved dividers to a defined initial value. As long as the PLL doesn't loose lock, the relation will be kept during operation.

Keeping a fixed phase relation between outputs doesn't depend on output:input frequency ratio. Obviously it depends on the exact ratio of output frequencies.