Forum Discussion
BoonT_Intel
Frequent Contributor
6 years agoHi Sir,
Here is the IBIS package available for all FPGA device, including Arria 10.
https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/board-layout-test/ibis/ibs-ibis_index.html
IBIS model is depend on which IO standard and termination setting that you set in the Quartus design.
CHenr14
New Contributor
6 years agoThank you. I have that file, but it does not contain the internal pin delays that would be in a [Define Package Model] keyword which will make DDR4 timing analysis more accurate. If the package model is not available, can the RLC values for each pin be provided so I can calculate the IBIS delays? The exact part number is 10AS022E3F29I1HG. Thank you again, Carolyn