Forum Discussion
CHenr14
New Contributor
New ContributorAre IBIS package models available for Arria 10 FPGAs?
This file would have information under [Define Package Model] in an IBIS file and be specific for each FPGA package. It correlates to the netlengths available on the website used for DDR/high speed ...
BoonT_Intel
Frequent Contributor
Frequent ContributorHi Sir,
Here is the IBIS package available for all FPGA device, including Arria 10.
https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/board-layout-test/ibis/ibs-ibis_index.html
IBIS model is depend on which IO standard and termination setting that you set in the Quartus design.
- CHenr14Thank you. I have that file, but it does not contain the internal pin delays that would be in a [Define Package Model] keyword which will make DDR4 timing analysis more accurate. If the package model is not available, can the RLC values for each pin be provided so I can calculate the IBIS delays? The exact part number is 10AS022E3F29I1HG. Thank you again, Carolyn
