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Altera_Forum's avatar
Altera_Forum
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14 years ago

Are CDC Synchronizers needed in this case

hi: If I have 2 clocks c1 and c2 which are derived from the same on chip pll and one

is a divide by 2 of the other, then do I still need a 2-flop synchronizer in going from

one clock domain to the other? If I meet setup constraints on both then is it still needed

since the PLL will make sure that the clocks are edge aligned?

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    In general, no, you should not need synchronization registers when crossing the boundary between related clocks. You just need to specify the relationship between the clocks. Since these clocks are generated by an internal PLL, you can specify the clock relationship with derive_pll_clocks in the .sdc file.