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Honored Contributor
Honored ContributorAppropriate ADC for educational project?
Hello folks! I'm a student of 'Network Systems and Data Communications' department in Greece and am doing my final project/dissertation right now in Leiria, Portugal at Electrical Engineering d...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Unless you want to use a variable clock rate for the ADS1202 (I don't know exactly, what shall be the purpose at all), you don't have a benefit from mode 3 in my opinion. --- Quote End --- How else are the adc and fpga supposed to be synchronized, when not wanting to use the internal clock of the adc for whole the system? We need 20MHz for 10BASE -T Ethernet transmission after processing data to be properly encapsulated into packets.
process(RESN, CNR)
begin
if RESN = '0' then
DN0 <= (others => '0');
DN1 <= (others => '0');
DN3 <= (others => '0');
DN5 <= (others => '0');
elsif CNR'event and CNR = '1' then
DN0 <= CN2;
DN1 <= DN0;
DN3 <= CN3;
DN5 <= CN4;
end if;
end process;
