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Altera_Forum
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18 years ago

Apex/Cyclone III I/O compatibility

Hi,

I wonder if the Cyclone III is fully compatible with Apex?

In other words I would like to know what do I have to be careful of if I decide to swap this two devices when upadating an specific electronic board?

Thanks a lot!

Galdric

10 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    1. you have to think about the resources that you used in the Apex device (logic cells and RAM) and see if the Cyclone III device will offer you at least the same amount;

    2. you have to be careful about the needed I/O pins;

    3. see if you find a speed grade suitable for your design;

    4. make sure that the different power supplies are available in your new board

    5. ask your Altera distributor about the price of the different Cyclone III models, he may have some special price on some of the part numbers for which he has a higher market

    Anyway I suggest you to fit your Quartus II poject into the new device and check directly the performances before designing the new electrical diagram.
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    1. you have to think about the resources that you used in the Apex device (logic cells and RAM) and see if the Cyclone III device will offer you at least the same amount;

    2. you have to be careful about the needed I/O pins;

    3. see if you find a speed grade suitable for your design;

    4. make sure that the different power supplies are available in your new board

    5. ask your Altera distributor about the price of the different Cyclone III models, he may have some special price on some of the part numbers for which he has a higher market

    Anyway I suggest you to fit your Quartus II poject into the new device and check directly the performances before designing the new electrical diagram.

    --- Quote End ---

    Only one additional remark:

    APEX FPGA could handle 5V input signals, as far as I know Cyclone III not.

    Maybe this not an issue today anymore.
  • Altera_Forum's avatar
    Altera_Forum
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    Thanks Plex and OrchestraDirector for your answers. I will be able to see if I have to do a lot of changes on the board.

    Is there also any known solutions (daughter board) to directly upgrade from Apex to Cyclone III?

    Thanks

    Galdric
  • Altera_Forum's avatar
    Altera_Forum
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    No, I am quite sure that no such board exists, you will need to re-design your board.

  • Altera_Forum's avatar
    Altera_Forum
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    The Apex that have to be replaced is an APEX 20K200.

    Speed grades for the 20K200 are -1,-2,-3

    Whereas Cyclones III grades are -6,-7,-8

    Does it mean I can t reach the same timing performances with the Cyclone III?

    Is there any chance a Cyclones III can replace an Apex 20K200 performance wise? Maybe I need to know if the 20K200 application worked at full speed...?
  • Altera_Forum's avatar
    Altera_Forum
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    Hi,

    why not just compile your project in Quartus in both cases i.e. change device selection to the required one and you will see the performance directly.

    You may leave the pin assignment to auto.

    kaz
  • Altera_Forum's avatar
    Altera_Forum
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    I haven t used Quartus yet...

    What do you mean by the "required one"?

    What does "pin auto"?

    Thanks a lot

    Galdric
  • Altera_Forum's avatar
    Altera_Forum
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    The "required one" is the Cyclone III FPGA that you can select from the Quartus II available list to check the new fitting of your design with the Cyclone III family.

    The "auto" pin assignment is a default setting for Quartus II which assigns the I/O pins of your design to automatically chosen pins of the selected device.
  • Altera_Forum's avatar
    Altera_Forum
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    Hi all,

    just to confirm last post.

    To compare two devices you need to fully compile your design for each case selecting the appropriate device and speed grade in each case.

    For a speeding-up your task, you can leave pins unassigned(Quartus will be happy and relaxed, though fitting will slightly differ from the final case when pins are assigned by the designer).

    kaz