Any way to get around "Transmitter ... exceeds the maximum allowed data rate ..."?

Just as a quick test I edited the PLL to generate 50 and 250MHz (for the DDIO IP) instead of 75 and 375MHz. This drops the data rate to 500Mbps and so the ERROR message is not triggered.

My Dell 2408WFP displays a picture and informs me that it is 1280x720 @34Hz.

So the flexible Dell can handle this very non-standard rate, but I am not expecting to work on my UK 50Hz HD TV!

It does appear that the timing tool is clever enough to figure out the PLL outputs and that they drive the DDIO clocks. Is there any way to define something in the SDC to fool the timing tool into thinking that the DDIO clocks are lower frequencies? BTW my SDC knowledge is pretty basic and any time I try to define something on an internal signal I get an error :-(.