Forum Discussion
New Contributor(AN741) Nios cannot erase on-chip FLASH
Hi, Junbum
You can find the start and end address of CFM1 (for your application image) in the .map file when you generate the .pof.
You need to copy and paste the block with above start and end address into a new .rpd (for the application image to be updated remotely). But in newer Quartus versions, you don't have to do that, there is a .rpd automatically generated for CFM1.
You need to create a quartus.ini in your project directory, and put below line in it, before you do covert programming file to .pof from your application .hex.
PGMIO_SWAP_HEX_BYTE_DATA=ON
Eric
New ContributorI found out where the problem is.
When I try to delete CFM1, the following codes are executed in order.
======================
case 5: /*State 5: Write Control Register of On-Chip Flash IP to un-protect and erase operation*/
IOWR(ONCHIP_FLASH_0_CSR_BASE, 1, 0xfdffffff);
IOWR(ONCHIP_FLASH_0_CSR_BASE, 1, 0xfdbfffff);
state++;
break;
case 6: /*State 6: Start erase CFM1*/
if((IORD(ONCHIP_FLASH_0_CSR_BASE, 0) & 0x13) == 0x10)
{
IOWR(ONCHIP_FLASH_0_CSR_BASE, 1, 0xfbffffff);
printf("CFM2 Erased\n");
state++;
}
if((IORD(ONCHIP_FLASH_0_CSR_BASE, 0) & 0x13) == 0x01)
{
//printf("Erasing CFM2\n");
}
if((IORD(ONCHIP_FLASH_0_CSR_BASE, 0) & 0x13) == 0x00)
{
printf("Erase CFM2 Failed\n");
state=20;
}
break;
case 7: /*State 7: Write Control Register of On-Chip Flash IP to un-protect and erase operation*/
IOWR(ONCHIP_FLASH_0_CSR_BASE, 1, 0xfbffffff);
IOWR(ONCHIP_FLASH_0_CSR_BASE, 1, 0xfbcfffff);
state++;
break;
=============
However, the code was in an infinite loop in case 6. The value of 'IORD(ONCHIP_FLASH_0_CSR_BASE, 0) & 0x13' was 0x03, which means busy.
In addition, it was confirmed that the writing of the register to be executed in case 5 was not working properly.
IOWR(ONCHIP_FLASH_0_CSR_BASE, 1, 0xfdffffff); <-(1)
IOWR(ONCHIP_FLASH_0_CSR_BASE, 1, 0xfdbfffff); <-(2)
The result of checking the result values for these two commands was as follows.
Register value before executing (1): 0x3fffffff
Register value before executing (1): 0x3fffffff
Register value before executing (2): 0x3fffffff
I could confirm that (2) was not working properly. I want to know how to solve the current problem.
