Honored Contributor
Honored ContributorGenerally that's true, the tx_inclock drives the PLL, so registering with it vs the tx_coreclock usually does not matter. However, depending on the placement of the parallel data in your device, you may need one level of synchronization from the parallal domain to the high speed domain. The tx_coreclock is the best phase match to the high speed serial clock in the SERDES logic, that's why the altlvds wizard defaults to coreclk instead of inclk.
If you get timing violations in the altlvds_tx function, the most likely cause is from registering with tx_inclock instead of tx_coreclock. It's just something to watch out for. -- Desert Rat
