Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorALTLVDS external clock
Hi all, I'm trying to implement the ALTLVDS_RX in a cyclone V. i would to connect the rx_enable and the rx_inclock to a fpga i/o (lvds dedicate input clock pins). is it possible? For now ...
Altera_ForumHonored Contributor
Honored Contributoryou are seeing the bunch of errors because you didnt put in a buffer.
Refer to below kdb: https://www.altera.com/support/support-resources/knowledge-base/solutions/rd04102013_389.html It will teach you how to put in the buffers. The error will go away after that.
