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Altera_Forum
Honored Contributor
11 years agoALTLVDS external clock
Hi all, I'm trying to implement the ALTLVDS_RX in a cyclone V. i would to connect the rx_enable and the rx_inclock to a fpga i/o (lvds dedicate input clock pins). is it possible? For now ...
Altera_Forum
Honored Contributor
11 years agoThere is a parameter editor allow you to choose the "Use External PLL option".
You can refer to the ALTLVDS IP core in external PLL mode from LVDS user guide for more details.