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Altera_Forum
Honored Contributor
Honored ContributorALTLVDS external clock
Hi all, I'm trying to implement the ALTLVDS_RX in a cyclone V. i would to connect the rx_enable and the rx_inclock to a fpga i/o (lvds dedicate input clock pins). is it possible? For now ...
Altera_ForumHonored Contributor
Honored ContributorHi,
It seems that you are trying to build an LVDS application with external clock. You can reference to the LVDS Userguide IP under the external clock chapter https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_altlvds.pdf I believe there should be a section with a guidelines on how to set the following 3 things you had mentioned --> LOADEN, OUTCLK, LVDSCLK
