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Altera_Forum's avatar
Altera_Forum
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10 years ago

altera set_false_path summary

hi,

in my .sdc file, i have declared some false paths such as -

set_false_path -from [get_clocks {*}] -to [get_clocks {*}]

set_false_path -from [get_ports reset_n]

the compilation/design implementation happens properly.

i wanted to know after compilation/fitting, where can i get a summary of the false paths showing the constraints have been picked up and are OK?

i.e. just like after compilation, we get a clocks summary, in the timequest window, indicating all the clocks and frequencies, is there some timequest option (or report) indicating all the paths that were set as false path in the sdc?

i am using quartus II.

please let me know .. altera/quartus beginner here ... :)

z

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    Your first line cuts every setup/hold/recovery/removal analysis in the design. That's pretty close to everything.

    Anyway, if you want to look at what's cut, use report_timing -false_path with the same options, e.g. something like;

    report_timing -setup -npaths 100 -pairs_only -detail full_path -from [get_clocks *] -to [get_clocks *] -panel_name "Clock to Clock"

    report_timing -setup -npaths 100 -pairs_only -detail full_path -from [get_clocks *] -to [get_clocks *] -panel_name "FP:Clock to Clock" -false_path

    The first one should return nothing and the second one should list the first 100 paths that have been cut.