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Altera_Forum
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10 years ago

Altera Assignment problem

Hello; In my design, I inferred a register with a clk-enable signal, but in the fitter report I found that this a high fan-out signal and affect the system critical path. Can i solve this problem ...
Altera_Forum's avatar
Altera_Forum
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10 years ago

You can also do register duplication in the source code. Create two signals assigned from the same source, but each one has a different destination. Then apply the nomerge attribute to them to prevent the synthesis from merging them.