Forum Discussion
New ContributorAlt for EP1K50TI144-2N
Nope, you are stuck with the EP1K50 series if all you have is a .pof file. Any temp grade, any speed grade will suffice.
You need the source code to migrate to any other device (or even a different size of the EP1K series) to do a recompile.
So unless you can come up with the source code you are going to be stuck sourcing EP1K50's from brokers.
Regular ContributorHello,
It has been a while since you last posted at this community forum. Do you have any further question regarding this case?
Best regards,
Nazrul Naim
FirasengHi Nazrul,
I did finally locate the Verilog code for the FPGA on that project ,so in that case which FPGA may require the least amount of code changes ,Cyclone II or Max V? I am referring to any macros custom to that chip?
Thanks
_AK6DN_Frequent Contributor
Probably about the same for either target device, but it also depends upon what IP (if any) you have in your original verilog code.
If it is mostly all your user written verilog, with may just PLL or I/O cell references, should be pretty easy to port.
If you used some old IP block that no longer is available you will need to write code to replace it or find the current equivalent, if any.
In any event having that verilog gives you a fighting chance of moving to a new device.
