AGFB014 FPGA F-tile PCIE Hard IP in 4x4 mode

Hi,

The AGFB014 FPGA F-tile PCIE hard IP is designed with certain configuration options, and the limitation you mentioned is likely a hardware limitation of the IP. Unfortunately, it seems that you cannot individually configure each x4 port to be either upstream or downstream within a single F-tile using the given IP.

To achieve the specific configuration you mentioned, with one upstream port and three downstream ports, you may need to explore alternative solutions. One possible approach could be to use multiple F-tiles and configure each F-tile with a different PCIe configuration. This would require additional FPGA resources and potentially more complex routing and interconnection between the F-tiles.

Alternatively, you could consider using external PCIe switches or PCIe bridge chips that offer the desired configuration options. These chips are specifically designed for PCIe switching and provide flexible configurations for upstream and downstream ports.

Regards

Wincent_Intel