Altera_Forum
Honored Contributor
12 years agoadding ROM to code.
Hello,
We are trying to implement SPI core using verlig code. If rom is not added and with just the core , code is working well. but when we try to add rom( on-chip memoery in Altera Sopc), we are getting some errors as show in the attachment. Can anyone let us know, how to compensate those. Thanks, vrv