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Altera_Forum
Honored Contributor
13 years agoadding ROM to code.
Hello,
We are trying to implement SPI core using verlig code. If rom is not added and with just the core , code is working well. but when we try to add rom( on-chip memoery in Altera Sopc), we are getting some errors as show in the attachment. Can anyone let us know, how to compensate those. Thanks, vrv1 Reply
- Altera_Forum
Honored Contributor
it says that you drive address bus twice (or more)
make sure where address-bus is connected to. maybe it is connected to port of on-chip-rom of output.(maybe). bye bye then.