Altera_Forum
Honored Contributor
15 years agoAdding Hex number- carry problem
Hi,
I want to add two hex numbers inside the process. Attached herewith is my code: " signal TX_checkSum: std_logic_vector (7 downto 0); begin process... case loop_back is when stage_one=> ... TX_checkSum<= (x"FF" +x"11"); ... end case; end process; " The answer is not good (x"10" instead x"110"). The problems is with the bit that will be added due to the adding operation: If I'll write: "TX_checkSum<= (x"FF" +x"11");"- I will cancel the carry. If I'll write: "signal TX_checkSum: std_logic_vector (8 downto 0);" -I will get an error (expression "('0','0','0','1','0','0','0','0')" has 8 elements ; expected 9 elements) If I'll add: " TX_checkSum<=('0' & (x"FF" +x"11");"- I will cancel the carry again (x"010" instead x"110")... What should I do?