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Honored ContributorADC0804 interfaced with CPLD
Hello All,
I am trying to interface an ADC0804 with a CPLD. The ADC0804 has potentiometerat the input. I have successfully tested the ADC using LEDs at the output, itworked fine. I am now moving onto the next step which is to connect the digitalADC outputs to a CPLD. My question is how do I connect the CPLD system clock tothe ADC, surely only 1 common clock should be used. I have seen on the internetthat different clocks are used. One for the microcontroller device and one forthe ADC0804, this does not seem right to me. If someone could give me someadvice I would really appreciate.14 Replies
Altera_ForumDave,
Thanks again, I am sorry the link for the hardware is below. http://www.matrixmultimedia.com/resources/files/datasheets/eb020-30-3.pdf I feel better connected the CPLD clock frequency to the ADC. I will have a go at this tomorrow and get some output traces. Before testing it actually on the hardware. Cheers Jag.- Altera_Forum--- Quote Start --- On most of the circuit diagrams I look at the RC network used to clock the ADC has the following value: C=150 pF and R=10 kohm. --- Quote End --- From the figure in the data sheet, the clock can be generated using an RC network, or you can just drive the clock pin directly from the CPLD. Personally I would drive it from the CPLD, so that you know the exact frequency. --- Quote Start --- I am using the matrix multimedia CPLD target board which has a 25 MHz crystal. --- Quote End --- Link? The ADC is a 5V part. I sure hope your CPLD is 5V tolerant ... --- Quote Start --- I have reduced the clock frequency to 625 KHz as read that is the most frequently speed used. I have followed the steps given on the data sheet for starting the conversion and reading the value. No success yet unfortunately. Does what I wrote see correct to you? --- Quote End --- Yes, it sounds fine. Capture some read/write traces ... you'll have to use an oscilloscope, since you are using a CPLD. If you were using an FPGA, you could use SignalTap. Alternatively, create a testbench and post Modelsim waveforms. Cheers, Dave
- Altera_Forum
Thank you very much for the reply and advice. On most of the circuit diagrams I look at the RC network used to clock the ADC has the following value: C=150 pF and R=10 kohm. I am using the matrix multimedia CPLD target board which has a 25 MHz crystal. I have reduced the clock frequency to 625 KHz as read that is the most frequently speed used. I have followed the steps given on the data sheet for starting the conversion and reading the value. No success yet unfortunately. Does what I wrote see correct to you?
- Altera_Forum
The ADC0804 is a pretty slow ADC (100us conversion time). Its basically designed for measuring DC values.
From a brief look at the data sheet http://www.ti.com/product/adc0804 It says you can treated the interface like a microprocessor I/O device. The timing diagrams show that the read/write interface is essentially asynchronous, you just have to assert the signals for as long as the data sheet indicates - based on how you clock the thing. Since the clock is so slow and the ADC dynamic range is only 8-bits (so clock jitter is not so important), you can generate the clock using the CPLD. Do you have a board that already contains the part, or are you just creating a proto-board interface? Cheers, Dave
