--- Quote Start ---
I will create a testbench as advised. The ADC has a potentiometer as the input.
--- Quote End ---
Great.
What I'm trying to do here is advise you on how to approach this problem. If you get stuck, then I'll help out. Take a shot at creating the testbench and getting your code to work, and I'll check it out. If necessary, I'll make some suggestions.
What is the overall plan for this ADC. You have a potentiometer as the input to the ADC, but what does that represent (or what will it represent later on), and who or what will be reading the ADC.
The CPLD board you are using is not very powerful, so you cannot implement a NIOS II processor. Is there a microcontroller on the board that can access the FPGA logic? If so, you could program that microcontroller to access the ADC reading, and then send it to your PC.
Its a good idea to start with a system design, and then start implementing the pieces.
Cheers,
Dave
Honored Contributor
