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Honored Contributor
Honored ContributorADC output from LVDS deserializer.
Hi, I have a an ADC sampling at 40 MHz, and it output LVDS signal, so i have to deserialize it using my DE2-115, but i am having trouble with the deserialized signal (shown in the picture), it ...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Dynamic phase shift is a basic feature of the PLL blocks since Cyclone III. It can be used to achieve a DPA-like functionality with the LVDS PLL, but not for individual bits. Unlike with hardware DPA, that can be simply enabled in the MegaWizard, you have to design the phase shift state machine and signal edge detector yourself. --- Quote End --- how hard do you think this can be for a newcomer like me?
