Active Serial Multi Device Configuration issue

Hi Aqid ,

This is proto A PCB , yes you right it will be corrected in proto B PCB.

But i am thinking of ways to make it work , if possible as on the PCB i do have a separate flash connected to 2nd FPGA and i can program it without any problems .

But my question is there is PCB_RESET_n comming from 1st FPGA to the 2nd FPGA , and some processing happens after RESET in the 2nd FPGA , because of this hardware problem this RESET will not be asserted by the 1st FPGA .

Does this issue cause the configuration of the 1st FPGA to be NOT implemented / programmed at all , or it will always be in reset state . Because with the 2nd FPGA configuring with a separate Flash , their boot up time will be different .

Because in testing i do see some communication possible between the two FPGA's , but some times its failing ?

Regards ,

Ahmed