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Altera_Forum
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11 years ago

Acheiving 480Mbps on Max10 A7 FPGA(FPGA Beginner)

Hi, In my new design i have selected Max10 A7 FPGA. i have a specific constraint for a particular signal. the signal have 480Mbps data rate and it should be connected to LVCMOS 1.2V IO. Is it ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Thanks a lot Friends , thanks for the guidence.

Ya my design is for HSIC which uses DDR for its data signal(and inturn it have to be bidirectional and driven on an LVCMOS 1.2V).

Regards

Sujesh