Accessing JTAG_UART from Matlab

Hi JoBird,

I just got done putting together a tutorial on my blog about how to use the Virtual JTAG MegaFunction, with a Tcl TCP/IP Server (which runs in the quartus_stp.exe). From there you can talk to the FPGA's design using just about any programming language that supports TCP/IP connections.

Might be a possible option for you:

http://idle-logic.com/2012/04/15/talking-to-the-de0-nano-using-the-virtual-jtag-interface/

After making the tutorial, I found that Dave wrote a more rigorous tutorial on this sort of solution here:

http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial

It would be nice to find a way to get rid of the Tcl middle layer, but I assumed I would have the same problems as you of trying to reverse engineer the Altera DLL's.

Maybe someone else knows the trick...

Regards,

Chris