Altera_Forum
Honored Contributor
10 years agoAbout VCCIO, VCCPGM, VCCPD for Configuration , genernal I/O pins at same bank
I am going to use Cyclone V, 5CGXBC5C6F23 for my project.
I am going to use the pins of Bank 3A for 1.8V I/O signals. I am going to use ASx4 configuration mode for configuration. In the Bank 3A, there are configuration pins such as DATA0 ~ DATA3, DCLK, nCS. Also in bank 3A, there are JTAG pins such as TMS, TDI, TDO, TCK. So I am going to use 1.8V for VCCIO, 3.3V for VCCPGM, 2.5V for VCCPD. In Assignment ---> Device ---> Device and Pin Options , There is option of "Force VCCIO to be compatible with configuration I/O voltage" When I check on this option, I got error message at FPGA implementation about "mismatching of the voltage level of VCCIO and VCCPGM". When I check off this option, I got no error message at FPGA implementation. Can I use 1.8V for VCCIO at the bank 3A ?