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Altera_Forum
Honored Contributor
12 years agoi am just using I/O, setting the DATA0 bit then triggering DCLK to latch it. very similar to the source code provided in the Altera application note: AN423: Configuring the MicroBlaster
Passive Serial Software Driver. On my scope the data and clock pulses look good. The clock is latched longer then 7ns as the spec states. I check my NSTATUS line throughout the process and it stays high. In testing I was able to inject errors and see NSTATUS drop low to show an error. Is there a specific way Quartus should be setup to build a PS serial file for loading like this? if email is easier let me know. this is one of the remaining issues we are trying to solve so my client can finalize their next board design. Thanks, Jordan